<?xml version="1.0" encoding="UTF-8"?>
<urlset xmlns="http://www.sitemaps.org/schemas/sitemap/0.9">
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/appendix/appendix-access-latency.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/chapter/chapter-cache-overview.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/chapter/chapter-introduction.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/chapter/chapter-memory-overview.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/chapter/chapter-pxros-data-coherency-implmentation.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/disclaimer.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/document-history.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/document-references.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/glossary.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
<url>
<loc>https://docs.hightec-rt.com/using-data-cache-in-aurix-pxros-hr-an/using-data-cache-in-aurix-pxros-hr-AN.html</loc>
<lastmod>2026-06-05T13:32:09.804Z</lastmod>
</url>
</urlset>
