Compute DSP (CDSP)

The Compute DSP (CDSP) is a specialized digital signal processor available in certain AURIXâ„¢ architectures, designed for high-performance mathematical and signal processing tasks.

Similar to other auxiliary cores in the AURIXâ„¢ family, the CDSP is not the boot master. Upon a system reset, the CDSP remains in a halted/sleep state. It relies on the primary TriCore (Core 0) to initialize the system clocks and release the CDSP from reset before any DSP code can be executed.

Configuration Steps

Because of this boot dependency, you must configure both the main TriCore application and the CDSP application(s) in your debug session.

Step 1: Main TriCore Setup (The Starter)
First, configure the primary TriCore application that contains the initialization code to power on the CDSP. On the main Debug Configuration tab, select your board and the TriCore executable.

CDSP Main Tab Setup
Fig. 1. Main Tab: TriCore and Board Configuration

Step 2: CDSP Executable Configuration
Next, navigate to the dedicated CDSP tab in your Launch Configuration. Depending on your hardware and project structure, you can browse and add one or multiple .elf files compiled for the CDSP architecture.

CDSP Executable Setup
Fig. 2. CDSP Tab: Setting the CDSP Executable(s)

Hardware Limitation for CDSP Debugging:
The CDSP cannot boot independently. If the main TriCore is not flashed and executed alongside it, the initialization code to power on the CDSP will not run. Consequently, the debugger will fail to connect or freeze while waiting for the sleeping CDSP to respond. Always ensure the TriCore starter project is provided in the Main tab.