TriCoreâ„¢ Architecture

The TriCoreâ„¢ processor is the primary processing unit across all generations of the AURIXâ„¢ microcontroller family. The HighTec TCF Debugger provides full support for TriCore-based applications, seamlessly handling both single-core and multi-core configurations.

Supported Families

  • AURIXâ„¢ TC2xx (1st Generation)

  • AURIXâ„¢ TC3xx (2nd Generation)

  • AURIXâ„¢ TC4xx (3rd Generation)

    • Note: When developing for the TC4xx family without utilizing auxiliary cores (such as the PPU, CDSP, or SCR), the microcontroller is treated and debugged as a standard TriCore target.

Configuration

To debug a standard TriCore application, open your Debug Configuration and navigate to the appropriate tab to set up your executable.

TriCore Configuration Setup
Fig. 1. TriCore Debug Configuration

Setup Steps:

  1. Executable Path: Browse and select the compiled TriCore .elf file.

  2. Hardware Accelerator (Board): Select your connected AURIX board (e.g., DAS JDS AURIX LITE KIT) from the dropdown list.

  3. Core Selection (TC4xx only): If you are working with a TC4xx board but only want to debug the TriCore, ensure your core mask is set to only target the TriCore (c) and ignores the auxiliary cores.

Multi-Core Debugging

For devices with multiple TriCore CPUs (e.g., Core 0, Core 1, Core 2), the debugger automatically maps the debug symbols to the correct memory contexts. You can seamlessly switch between threads and cores in the Eclipse Debug View.