How can I use the instruction cache?

The TriCore distinguishes between cached and non-cached areas. Usually, Segments 8 to 9 are cached, whereas segments A to B are non-cached. To activate the instruction cache, you have to transfer the start address of memory region int_flash0 from segment A to the cached area of segment 8 (0x80000000) in the linker script.

Furthermore, the instruction cache has to be activated on your hardware via your source code.

Example

/* ------------------------------------------------------------------------------------------------
 * FUNCTION: bsp_uc_core_EnableICache()
 *    Enables Instruction cache on the current core
 * ----------------------------------------------------------------------------------------------*/

#ifndef BSP_UC_CORE_ENABLEICACHE_UC_SPECIFIC

void bsp_uc_core_EnableICache(void)
{
    /* Initiate invalidation of current cache contents if any */
    Ifx_CPU_PCON1 pcon1;
    pcon1.U = 0;
    pcon1.B.PCINV = 1;
    __builtin_tricore_mtcr(CPU_PCON1, pcon1.U);

    /* PCACHE enable */
    unlock_wdtcon();
    Ifx_CPU_PCON0 pcon0;
    pcon0.U = 0;
    pcon0.B.PCBYP = 0;
    __builtin_tricore_mtcr(CPU_PCON0, pcon0.U);
    __builtin_tricore_isync();
    lock_wdtcon();
}

#endif

This code snippet comes from our BSP example for the TC39x.