How do I transfer code to the internal RAM (PSPR)?

The internal RAM (PSPR) is well-suited for quick executions of parts of a program. The code within this area has to be copied from the internal Flash (Code ROM) to the internal RAM (PSPR) during runtime.

Step 1.

Store a function at a user-defined section, e.g., ".internalcode" by adding a "#pragma" section instruction to your C/C++ sources.

Example #pragma section

#pragma clang section text=".internalcode"
	int add1(int foo)
	{
		return foo+1;
	}
#pragma clang section text=""

Step 2.

Create an Output section that stores the .internalcode section of the linker script at the int_cram memory area that contains the internal RAM (PSPR).

Example Output section

	.internalcode :
	{
		IROM_BASE = . ;
		*(.internalcode)
		*(.internalcode.*)
		. = ALIGN(8) ;
	} > pspr_cpu0 AT> int_flash0 =0

Step 3.

Add the following line to the copy table section in the linker script.

Example entry in the copy table

.CPU0.copy_sec : ALIGN(8)
	{
		PROVIDE(__copy_table = .) ;
		LONG(LOADADDR(.internalcode)); LONG(ABSOLUTE(IROM_BASE));
		LONG(SIZEOF(.internalcode));
	}

.internalcode: Creates the Output section ".internalcode".
IROM_BASE = .;: Creates the IROM_BASE symbol at the start area of the internal Flash int_flash0. This symbol is used to indicate the start address for copying the code from the internal Flash to the internal Code-RAM (see the copy table entry).
(.internalcode), *(.internalcode.): Collects all input sections, such as in compilation units with #pragma clang section text=".internalcode" or #pragma clang section text=".internalcode.<name>", and stores them consecutively in the output section of the linker script that is defined by ".internalcode".
. = ALIGN(8);: Defines the alignment.
> pspr_cpu0 AT > int_flash0 =0: The address where the code is loaded varies from that where it is executed since the program is copied from the internal Flash to the internal Code RAM where it is ultimately executed. The line is to be read from right to left and means that the code has a loading address in the internal Flash AT int_flash0 and is to be executed at the address pspr_cpu0 in the internal RAM (PSPR). The zero in "int_flash0 =0" means that gaps in the memory are to be filled with zeros.