Generation of Traps

It is possible to generate a trap violently. All MPU traps generation is listed below. There also is a way to generate a trap from classes 3, 4.

Internal Protection Traps (Trap Class 1)

For violent trap generation, the MPU must not be set for areas where the instruction should cause a trap.

Code 1. Privileged Instruction (TIN 1)

__MTCR(0xC010, 0xFF);

Code 2. Memory Protection Read (TIN 2)

trapCnt = *(unsigned int *) 0x8;

Code 3. Memory Protection Write (TIN 3)

*(PxUInt_t *) 0x8 = 0x20;

Code 4. Memory Protection Execute (TIN 4)

int (*bad_instruction)(void) = (void *)0x81000001;
bad_instruction();

Code 5. Memory Protection Peripheral Access (TIN 5)

trapCnt = SCU_CCUCON0.U;

Code 6. Memory Protection Null Address (TIN 6)

trapCnt = *(unsigned int *) 0x0;

Code 7. Global Register Write Protection (TIN 7)

__asm__ volatile ("movh.a %a0, 0x8000");

System Bus and Peripheral Error (Trap class 3)

Code 8. Free Context List Underflow (TIN 4)

void csa_underflow()
{
    csa_underflow();
}

void InitTask_Func(PxTask_t myID, PxMbx_t myMailbox, PxEvents_t myActivationEvents)
{
    ...

    csa_underflow();

This (FCU) will cause an unrecoverable error. Stack size must be sufficient not to cause the MPU error (stack overflow) first.

System Bus and Peripheral Error (Trap class 4)

Code 9. Program Fetch Synchronous Error (TIN 1)

int (*bad_instruction)(void) = (void *)0xE0000000;
bad_instruction();